MRD F2F Decoder Chip / MRD531B-LQ-L

Description

The MRD531B-L is a Pb-free CMOS integrated circuit for the purpose of recovering F2F encoded data received from a magnetic head.

Features

Integrated Amplification Circuit for magnetic head signal.

Both output polarities supported.

Adjustable read data output clock pulse width.

Triple channel and support for 75/210bpi recording density.

Magnetic head data input frequency range from 300 bit/sec to 12600 bit/sec.

Power-down stand-by mode to reduce current consumption.

Provide the option of 8 or 11 leading bits ignored

Enhanced noise filter
Automatic offset voltage cancellation circuit for amplifiers
Advanced algorithm to effectively read poor condition cards as well as high jitter cards

Order information

Part Number

Pb free

Temperature Range

Package Type

MRD531B-LQ-L

Yes

-20XC to +70XC

32-pin LQLP